Kh.M.Dzhakhirul K. Cubic Fault Simulation for Fault Coverage Test Analisys on Digital System Design

The thesis is devoted to the development structural-functional models of digital devices, procedures and algorithms of cubic analysis of faults during test generation for decreasing time and material expenses, related to verification of digitals systems for computer-aided designing. During the period of research following problems were solved: modification of finite-state model of synchronous primitive, descripted by two-state cubic covering; creation of cubic algorithm of deductive fault simulation on basis of analysis cubic coverings of primitives; development of program complex of fault simulation, that allows to define tests fault coverage, that generated for digital systems on chip.