Md. M. Models and Algorithms for Test Generation of Digital System for its Designing in Active-HDL

Українська версія

Thesis for the degree of Candidate of Sciences (CSc)

State registration number

0402U000671

Applicant for

Specialization

  • 05.13.12 - Системи автоматизації проектувальних робіт

15-01-2002

Specialized Academic Board

Д 64.052.02

Kharkiv National University Of Radio Electronics

Essay

The thesis is devoted to the development of structural-functional and pseudo-combinational models and algorithms of deterministic test generation of digital system for decreasing of their verification time for computer aided design using Ac-tive-HDL. The general scientific results are: modification of synchronous digital primitive model for flip-flop circuits de-scription; improvement of models and algorithms of fault de-tection and test generation; linear model of fault detection and test generating for all essential variables based on cubic cover-age of functional description circuit; applications strategy of deterministic and algorithmic test generators for large dimen-sion digital system.

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