Mohamad Z. Method and means of logarithm checking for computing devices processing mantissas of floating-point numbers

Dissertation is devoted to questions of on-line testing for modern computing devices processing mantissas of floating-point numbers. The logarithm checking method for arithmetical operations with mantissas in iterative array computing circuits is designed. The natural information redundancy of floating-point formats is found. This is used for definition check code of mantissa and checked equations for verify of shift, addition, multiplication and division with mantissas. The means of the logarithm checking for computing circuits processing mantissas are designed. The check computation complexity is reduced for 1,5 ? 6 times in comparison with residue checking. The method excludes error detection in the bits restricted in mantissa rounding case.