Kaduk O. Fault tolerance multi-bit self-calibrating ADC and DAC with weight surplus

Українська версія

Thesis for the degree of Candidate of Sciences (CSc)

State registration number

0410U000578

Applicant for

Specialization

  • 05.13.05 - Комп'ютерні системи та компоненти

26-02-2010

Specialized Academic Board

Д 05.052.01

Vinnytsia national technical university

Essay

The purpose of work is providing of fault tolerance of multi-bit ADC and DAC with weight surplus by self-calibrating of both bit weights and transfer characteristic. The research object is the process of providing of selfcalibrated DAC and ADC with gravimetric surplus fault tolerance. The subject of investigation are methods and means of maintaining multi-bit DAC and successive approximation ADC with weight surplus fault tolerance. Research methods are based on the use of theory of information conversion, theory of errors, probability and mathematical statistics, computer simulation. The scientific novelty of receive results consists in that the method of maintenance of multi-bit ADC and DAC with weight surplus fault tolerance, analytical equations for calibration interval evaluation of multi-bit DAC and successive approximation ADC with weight surplus. The practical results are flow diagrams structures of fault tolerance multi-bit ADC and DAC with weight surplus, device for voice quality control. Main positions are introduced in public enterprise "Ukrkosmos", Kyiv, general enterprise "Institute of electronic and connection", Kyiv, and educational process of computer engineering chair of Vinnytsia National Technical University. Utilization fields are establishments and enterprises carrying out development of the high-fidelity informative measuring systems, measuring checking systems which works in difficult terms.

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