Tsololo S. Hardware optimization of Moore FSM on programmable logic devices

The subject of research: synthesis of Moore FSM. The aim - development of structures and methods of synthesis of Moore FSM, oriented on diminishing of logic circuit's hardware expenses under its realization on CPLD.The analysis of features of CPLD and existent structures and methods of FSM's synthesis is proposed. The methods of optimization of Moore FSM circuit, based on application of different ways of encoding of the states and oriented to the effective use of CPLD features for diminishing of hardware expenses of FSM's circuit is proposed. Structures and methods of optimization of Moore FSM circuit, based on application of a few sources of codes of the states and oriented to the effective use of features of the mixed CPLD. Sphere of application: enterprises of microelectronics and radioelectronic industry, which are designing circuit of control unit of FPGA.