Ivanov V. Designing of multilayer digital crystal topology with regard to noise immunity

Research object - the processes of synthesis of physical structures of multilayer digital crystals. Research target is working of new mathematical methods, algorithms and tools for the design of multilayer digital crystals based immunity and solutions on this basis, an important scientific and practical tasks of increasing the effectiveness of computer-aided design of microelectronic devices topology to meet the requirements of accuracy, computational and time constraints. Research methods: the methods of systems analysis, graph theory, mathematical programming to solve the problem channel trace used graph theory, for solving optimization problems of topology design methods were used directional sorting options. Research apparatus: personal computer. Theoretical and practical results - methods of designing the topology of digital systems based on crystals of immunity develop a methodological framework of effective tools of decision support technology for automated tracing of microelectronic devices. Scientific novelty - the important scientific and engineering problem of increasing efficiency of the automation systems for designing microelectronic devices topology by way of creating the effective mathematical methods, algorithms and software for the procedures of the multilayer digital crystals systems synthesis with regard to noise immunity, precision computational and temporal limitations is solved in the thesis. The general problem of the microelectronic devices topology synthesis is formulated, it unites the known partial problems and takes into account heterogeneous optimization criteria. The system of rules for the problem of double-layer and multilayer channels topology designing, which makes it possible to reduce the permissible decisions scope of search, is developed. The methods of truncated versions sorting based on the reassignment method for solving the problems of synthesis of the multilayer topology microelectronic devices, having less temporal complexity than the available methods, are developed and improved. The conditions for designing the topology of a planar circuit in a single-channel layer, which make it possible to obtain more efficient solutions than the known methods, are developed. The research results were used: in state budget in the research work carried out under the thematic plan of scientific research of Kharkov National University of Radio Electronics, funded by the Ministry of Education, Youth and Sports of Ukraine in the learning process at the department of design and operation of electronic devices of Kharkov National University of Radio Electronics (the certificate of implementation from 12.15.2010) in TSKKB "Proton" (the certificate of implementation from 02.10.2011); in SSPE "Kommunar" (the certificate of implementation from 01.02.2011).