Elias R. Methods and Tools for Designing Configurable Sectional Operating Devices for Digi-tal Signature Processing

Dissertation is devoting the decision of the scientifically applied task of creation of configurable sectional operational devices for processing digital signatures based on elliptic curves. Major concentration was spared over the hardware representation of sectional devices on FPGA, oriented to work with the multibit elements of the simple and binary fields of Galois. The bit of the fields exceeds the national standards sets of Ukraine and answers the requirements of international standards. It is suggested to present operating devices as a multilevel hierarchical sectional structure - functional channel, hardware complication of levels of which diminishes in a geometrical proportion which provides the best correlation of the productivity and hardware resources. The methods of planning of such structures are selftest methods, methods of built-in control of sectional elements and method of mask of work where their control units are offered and improved. The design tools as a core generator of basic sectional units is realized, adequacies of the offered methods and facilities are executed, and their introduction is carried out.