Obrizan V. Multiversion parallel synthesis of digital structures based on SystemC specification

The goal of the investigation is significantly reducing the time for designing computing architectures and improving the quality of digital products by way of multiversion synthesis of a digital product structure based on a specified specification in SystemC (C++) environment, and automatically selecting functional components through the parallel synthesis and verification of architectural solutions of the system level in accordance with the proposed metric. Main results are the following: 1) a new method for synthesizing interface structures and RT-level transaction protocols is proposed; it is based on the analysis of the SoC system-level architecture specification, which is characterized by using a two-sided standard Wishbone data bus between functional modules, which allows the multiversion creating components of a digital system-on-chip; 2) a new method for synthesizing RTL-models of functionalities is proposed that is characterized by one-valued transformation of C++ and SystemC-descriptions of digital blocks of the system level into algorithms and data structures of the Moore automaton model defined by a synthesized subset of VHDL descriptions, which makes it possible to significantly reduce the time of designing, testing and verification; 3) data structures for the description of functional primitives of the system level have been improved, which differ using semantic and syntactic constructions of C++ and SystemC, which allows performing parallel synthesis and verification of architectural solutions; 4) a method of multiversion synthesis of control and operational automata focused on architectural solutions in the metric is improved, which is characterized by a minimum time for operating a functionality through parallel executing the operations with a limitation on hardware costs