Tkachuk T. Complexity characteristics of specialized functions SH-models and it application for special processors optimization

Українська версія

Thesis for the degree of Candidate of Sciences (CSc)

State registration number

0418U003220

Applicant for

Specialization

  • 05.13.05 - Комп'ютерні системи та компоненти

28-09-2018

Specialized Academic Board

Д 35.052.08

Lviv Polytechnic National University

Essay

The dissertation is devoted to the questions of creation effective structural constructions of special functions of the special processor of processing signals, by the method of constructing the corresponding SH-models and optimization of the values of their characteristics of complexity. For this purpose, optimization of the characteristics of the complexity of arithmetic devices and devices of special functions of the special processing of signals, the ways of improving the known method of calculating the structural characteristic of complexity for structures of special functions have been analyzed and improved by identifying and integrating into a group of similar type elements of the scheme, which made it possible to receive matrices incidents of a much smaller size without regular elements and, as a result, simplified the calculation and reduced the time for the design of the system, the structure of the conveyor multiplication device has been developed, with the delay of the conveyor stage not greater than the delay on one multi-bit adder, and the absence of dependence on the dimension of the input data, developed SH-models of devices of special functions of processing signals, namely, convolutions and fast Fourier transform, with optimized values of complexity characteristics, we obtained the RH model with a combination of convolution algorithms and a Fourier fast butterfly, which has optimal values for time and structure. The VHDL models of modified devices are implemented: an optimized two-way conveyor matrix multiplication device, an optimized convolution device, a fast Fourier transform device, and a reconfigurable device that implements the convolution algorithms and the Fourier fast butterfly algorithm. The use of the obtained results allowed to improve the value of the structural and time complexity of the special functions devices and implement the data processing conveyor with a delay of 8.1 ns.

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