Liubarskyi M. Quantum models and methods for logic X-function analysis

Українська версія

Thesis for the degree of Candidate of Sciences (CSc)

State registration number

0419U000836

Applicant for

Specialization

  • 05.13.05 - Комп'ютерні системи та компоненти

27-02-2019

Specialized Academic Board

Д 64.052.01

Kharkiv National University Of Radio Electronics

Essay

The purpose of the research is reducing the verification time of digital systems-on-chips by using memory-driven architectures and qubit data structures to compactly describe logical X-functions and significantly improve the performance of methods for testing and deductive fault simulation through par-allel computing of algorithms. The essence of the research is quantum models and methods for test synthesis and fault analysis of logical X-functions based on the use of qubit data structures and memory-driven architectures for parallel computing of algorithms in order to significantly improve the performance of testing and deductive simulation of digital systems-on-chips. Scientific novelty of research results: 1) A structural model of the metrical properties of X-functions is proposed for the first time, focused on executing parallel operations on qubit data structures in order to provide linear time of test generation and simulation of digital systems. 2) An analytical model for the synthesis of qubit coverages of X-functions of a finite number of variables is proposed for the first time, characterizing by the possibility of creating logic circuits, which do not require exponential costs of generating and analyzing tests. 3) A parallel method of test synthesis for the faults of X-functions of a finite number of variables is proposed for the first time, characterizing by taking Boolean derivatives with respect to qubit coverages, which makes it possible to generate tests of minimal length. 4) A parallel method for the synthesis of deductive qubit coverages for simulation of X-functions is proposed for the first time, characterizing by obtaining a unit matrix of derivatives, which makes it possible to create a sequencer for fault simulation that is invariant to the input test patterns. 5) Memory-driven architectures and algorithms for implementing methods for testing and verifying digital systems-on-chips are improved, which are distinguished by the parallel execution of logical operations on qubit data structures. 6) The quantum methods of test generation and deductive fault simulation of logic functions are improved, which differ from analogs in the synthesis of matrices of Boolean derivatives with respect to their qubit coverages.

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