Murashchenko O. Method and tools for high-linear ramp generation based on DAC with weight redundancy

This dissertation work is devoted to the development of methods and means of high linearity ramp generation based on DAC with low-glitch coding. The aim of the research is to improve the linearity of digital ramp generators, which differs from the existing in application of low-cellular coding based on DAC with weight redundancy. The analysis of existing mathematical models of glitches in DAC was performed and their imperfection and inaccuracy are shown, which limits the possibility of their usage in the development and analysis of DACs and systems based on them. The impact of glitches on the dynamic errors in the DAC and on the speed of bitwise analog-to-digital conversion is considered and their negative effects on the dynamic characteristics of the DAC are shown. The analysis of traditional methods and means of reducing glitches in DAC was performed and their disadvantages were pointed out. The method for reducing glitches in high linearity ramp generators is proposed, a feature of which is the use of low-glitch coding based on DAC with weight redundancy. The mathematical model of glitches in DAC with weight redundancy has been proposed. The analysis of the specified mathematical model was performed. The efficiency of the use of weight redundancy to reduce the level of glitches in the DAC was evaluated and the optimal parameters of the numerical systems on the basis of which the DAC was built were proposed. A modified Fibonacci calculus system (MF-system) is proposed for the construction of high-speed counters, which is characterized by an extension of the digit range, which makes it possible to reduce the number of equipment when constructing mentioned counters. The method for the construction of high-speed Fibonacci counters in the MF-system of calculus of three types was proposed. The general schemes of the structural organization of each type of counter and the schemes of the structural organization of their individual digits have been developed. Structural and schematic diagrams for two-stroke DC amplifier have been developed. The use of the proposed high-linear and high-speed two-stroke DC amplifier circuits will improve their static and dynamic characteristics and multi-bit analog-digital systems as a whole. Recommendations for the design of analog and digital ramp generators of high-line signals based on DAC with low-glitch coding were provided on the basis of the methods and tools proposed in this work. The structural organization of the generators of the specified analog signals based on the Fibonacci digital-to-analog converter and using high-speed Fibonacci counters is proposed. The structural organization of such generators and the functional circuits of their meters are described. The development of software for modeling the operation of high-speed Fibonacci counters is described. The simulation confirmed analytically calculated characteristics.