Hahanova I. Models and methods of system design of computing structures on chips for the digital signal processing

A system model of the JPEG2000 coder is developed by using MATLAB software and the high level verification language environment of a design device; a system executable model and RTL-model of the arithmetical wavelet transform block for the JPEG2000 coder, a system model of control automaton for the pipeline computational architecture SoC DSP and the method of automatic block generation of problem-oriented control devices, an encoding method of the binary sign matrixes with a priori unknown static characteristics on basis of decrease the structural redundancy of video image, MQ-coder system model that is oriented on hardware implementation of an executive device of SoC DSP transformer into a programmable logic chip on basis of the pipeline architecture of computational processes, automatic HDL-code generation software, hardware – SoC DSP filter – that is realized as a digital system on a chip with the pipeline architecture of computational processes of an executive device, which is controlled bya high-speed specialized automaton on basis of the counters, are developed.