Malinovskiy M. Methods and means of designing of technical and program components of safe FPGA-controllers with parallel architecture

Українська версія

Thesis for the degree of Doctor of Science (DSc)

State registration number

0510U000594

Applicant for

Specialization

  • 05.13.05 - Комп'ютерні системи та компоненти

24-06-2010

Specialized Academic Board

Д 64.050.14

National Technical University "Kharkiv Polytechnic Institute"

Essay

Research object: the process of designing the hardware and software components of systems for critical application. Research purpose: safety of critical systems by developing methods and tools of design of hardware and software components of data processing and formation of control actions on the basis of safe FPGA-controllers with parallel architecture improving. Research methods: the automata theory was used in developing of the methodology of synthesis of safe controllers with degradation and models of safety devices of forming of control actions. In the development of models of safe controllers with cyclic action methods of synthesis of parallel programmable logic controllers were used. In constructing of models of safe controllers Petri nets were used. When designing a language THDL for FPGA methods of description of programming languages were used. Methods of simulation, mathematical and physical modeling in the analysis of safe FPGA controller and safe devices of forming of control actions were used. Methods for evaluation of the complexity in carrying out a performance assessment of functional safety of THDL were used. When performing a functional assessment of the safety reliability theory, graph-analytical method of calculating the functional safety were used. Probability theory and methods of statistical analysis were used to assess the safety of software, developed at the THDL. Theoretical and practical results: the obtained results allows to solve problems associated with designing safe FPGA-controllers with parallel architecture for critical systems. Based on the obtained methods and models safe modules of the data processing with the degradation control based on FPGA, safe modules of forming of the output control actions, tools and design language for safe FPGA-controller and hardware and software complexes based on them are developed. Novelty: At first a set of mathematical models and methods of synthesis of safe Automata with parallel action which do not require redundant safe coding of internal states and, through the use of established procedures of transformation of graphs of ?-machines, provide management of functional degradation and conservation implemented responsible function failures were proposed. Methods of specifying of safe Automata, which, unlike the well-known, based on the formal description of safety requirements by ?-automaton models of the M-and P-type, as well as the formation of sets of responsible operations which are realizable by machine allowing use of conjunctive management of functional degradation were further developed. Method for describing digital devices in the FPGA were improved: language, technology and programming tools, which, unlike the well-known, based on the use of simplified tabular structures to describe the procedures for processing information, settings, security features, and coding input and output signals, thereby reducing number of errors and thus improve the safety of software were developed. Methods for designing of safety devices forming control actions by using the principle of the progressive transformation of signal parameters that are dynamically changing over the time, which precludes the formation of dangerous control actions in case of failure of control of funds and there is at least one working channel were further developed. For the first time the math and HDL-models of n-channel devices of safety formation of harmonic signals, which, in contrast to the well-known that generates the PWM signal through the use of logical operations “exclusive OR” for the two signals with close frequencies and preclude the generation of hazardous control actions in the presence of (n - 1)-multiple failures were offered. The method of Chapin assess the complexity of software that allows to calculate the complexity of HDL-descriptions with the use of verified program components and hierarchical descriptions of digital devices based on FPGA was further developed. Degree of introduction: Kharkiv Metro. Sphere of the use: critical application systems control.

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