Pshenychnyi K. Temporal finite state machines models and verification methods in hardware description languages
Українська версіяThesis for the degree of Doctor of Philosophy (PhD)
State registration number
0824U002425
Applicant for
Specialization
- 123 - Комп’ютерна інженерія
29-06-2024
Specialized Academic Board
ІD5748_Пшеничний
Kharkiv National University Of Radio Electronics
Essay
Research papers
Files
autoreferat-АНОТАЦІЯ_Пшеничний.docx
Пшеничний_Моделі_та_методи_верифікації_темпоральних_моделей_кінцевих_автоматів_pdf.pdf
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