Kornachevskyy Y. MOS-transistors models for design of integrated submicron circuits

Українська версія

Thesis for the degree of Candidate of Sciences (CSc)

State registration number

0404U002664

Applicant for

Specialization

  • 05.13.12 - Системи автоматизації проектувальних робіт

21-06-2004

Specialized Academic Board

Д.26.002.08

Essay

An effective ways for building of models in the circuit design CAD on the example of submicron level model BSIM3 are researched in the thesis. The structure of MOS-transistor model is studied, as well as effects which affect computation accuracy of model parameters of transistor of submicron sizes, the sequences of building of model in circuit design CAD and correctness of the model by means of comparative simulation. Proposed the method of consideration of intrinsic capacitances in the forward and inverse modes, introduced equation for capacities in the forward and inverse modes, established independence of speed of calculations to the second derivatives to the charge in the transistor nodes with respect to node voltages. The comparative design showed that newly introduced modified model besides of correct simulations exceeds corresponding SPICE model by the effectiveness.

Files

Similar theses