Zouaoui R. Construction of the energy-efficient tests and identifying sequences of digital circuits based on the simulated annealing method

Українська версія

Thesis for the degree of Candidate of Sciences (CSc)

State registration number

0411U004084

Applicant for

Specialization

  • 05.13.05 - Комп'ютерні системи та компоненти

16-06-2011

Specialized Academic Board

Д 11.052.03

State Higher Educational Institution "Donetsk National Technical University"

Essay

Object of research: digital logic circuits, defined on a structural level as a regular network of logic elements. Objective: to increase the effectiveness of computer-aided diagnosis of digital circuits by developing new evolutionary algorithms for constructing of the identifying sequences and for optimization such sequences that are based on the simulated annealing strategy. The study is based on the methods of technical diagnostics, evolutionary computation, theory of Boolean functions, finite automata, and logic simulation. Basing on the simulated annealing strategy the one-level algorithms for constructing of initializing and equivalence verification sequences are proposed. A three steps strategy of building of the energy efficiency tests basing on redundant testing are proposed. Phases of redundant test generation and selection of the suboptymal set of sequences are implemented on the simulating annealing algorithm. The algorithms and software are developed to solve the mentioned above problems. Approbation on the circuits from international catalog ISCAS-89 shows the increase of quality of constructed sequences from 3 to 30% depending on the type of problem, and the heat dissipation during their application is reduced on average by 86%. The proposed methods and developed software used in the Institute of Applied Mathematics and Mechanics in the form of a new module «SA-Analyze» in automated simulation and diagnostics system ASMID.

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