Lyakhovets'kyj O. Methods of functional-logical design of fast arithmetical devices based on symmetric boolean functions

A new approach to fast arithmetical devices (AD) design has been developed, that is based on using of specific particularities of data input symmetry, and can provide considerable speedup, hardware abundunce reduction of developed devices due to considering of some specific properties of performed operations, simplification of design procedures, unification of design process and possibility of automation of some design procedures. Methods of functional-logical design of fast multi-operand adders and multipliers are suggested, that are based on usage of symmetric boolean functions with partial symmetry for defining functionality of these devices. The results of research work are recommended to use for design of arithmetical-logical units, contained in special processing devices, intended for digital signal processing, parallel data flow real time processing, coding and decoding devices and other tasks, that are critical to system response time.