Kuivashev D. Retargetable code generation methodizes for microprocessor architectures with irregular very long instruction word

Thesis is devoted to investigation of methods and software design of optimizing retargetable compilers for digital signal processors and VLIW microprocessors. Special attention is paid for improving existing code generation techniques and intellectualization of compilation process using integration of knowledge about optimization for target processor and code generation paradigm into retargetable compiler. Formalisms for representing program as hierarchical graph model and optimizations as graph productions and representation of target microprocessor architecture are investigated. A technique for formalizing knowledge about compilation process with production expert system is proposed, which allows to make compilation process intelligent.