Ivanov D. The development of the fault simulation and test generation methods of the digital circuits in multivalued alphabets

The object of the research: the methods of the fault simulation and test generation for digital devices. The aim of the research: rise of the effectiveness of automatic diagnosing of digital devices The methods of technical diagnostics, theory of boolean functions and switching devices are used. An algorithm of parallel fault simulation in 16-valued logic is developed. For parallel fault simulation combined with single fault propagation it is proposed the new speed-up methods: static and dynamic fault ordering, new structural functional fault injection methods. An algorithm of test generation is developed, that based on the genetic approach. The program implementation of the proposed algorithms are incorporated in automatic simulation and test generation system ASMID-E, which used for the development of the real digital devices in “Avtomatgormash”.